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 DM9370 7-Segment Decoder/Driver/Latch with Open-Collector Outputs
October 1988 Revised March 2000
DM9370 7-Segment Decoder/Driver/Latch with Open-Collector Outputs
General Description
The DM9370 is a 7-segment decoder driver incorporating input latches and output circuits to directly drive incandescent displays. It can also be used to drive common anode LED displays in either a multiplexed mode or directly with the aid of external current limiting resistors.
Ordering Code:
Order Number DM9370 Package Number N16E Package Description 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
Logic Symbol
VCC = Pin 16 GND = Pin 8
Pin Descriptions
Pin Names A0-A3 LE RBI RBO a-g Description Address Inputs Latch Enable Input (Active LOW) Ripple Blanking Input (Active LOW) Ripple Blanking as Output (Active LOW) as Input (Active LOW) Segment Outputs (Active LOW)
(c) 2000 Fairchild Semiconductor Corporation
DS009797
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DM9370
Truth Table
*The RBI will blank the display only if binary zero is stored in the latches. **RBO used as an input overdrives all other input conditions. H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
Functional Description
The DM9370 has active LOW outputs capable of sinking in excess of 25 mA which allows it to drive a wide variety of 7segment incandescent displays directly. It may also be used to drive common anode LED displays, multiplexed or directly with the aid of suitable current limiting resistors. This device accepts a 4-bit binary code and produces output drive to the appropriate segments of the 7-segment display. It has a hexadecimal decode format which produces numeric codes "0" through "9" and alpha codes "A" through "F" using upper and lower case fonts. Latches on the four data inputs are controlled by an active LOW latch enable LE. When the LE is LOW, the state of the outputs is determined by the input data. When the LE goes HIGH, the last data present at the inputs is stored in the latches and the outputs remain stable. The LE pulse width necessary to accept and store data is typically 30 ns which allows data to be strobed into the DM9370 at normal TTL speeds. This feature means that data can be routed directly from high speed counters and frequency dividers into the display without slowing down the system clock or providing intermediate data storage. The latch/decoder combination is a simple system which drives incandescent displays with multiplexed data inputs from MOS time clocks, DVMs, calculator chips, etc. Data inputs are multiplexed while the displays are in static mode. This lowers component and insertion costs since several circuits--seven diodes per display, strobe drivers, a separate display voltage source, and clock failure detect circuits--traditionally found in incandescent multiplexed display systems are eliminated. It also allows low strobing rates to be used without display flicker. Another DM9370 feature is the reduced loading on the data inputs when the Latch Enable is HIGH (only 10 A typ). This allows many DM9370s to be driven from a MOS device in multiplex mode without the need for drivers on the data lines. The DM9370 also provides automatic blanking of the leading and/or trailing-edge zeroes in a multidigit decimal number, resulting in an easily readable decimal display conforming to normal writing practice. In an 8-digit mixed integer fraction decimal representation, using the automatic blanking capability, 0060.0300 would be displayed as 60.03. Leading-edge zero suppression is obtained by connecting the Ripple Blanking Output (RBO) of a decoder to the Ripple Blanking Input (RBI) of the next lower stage device. The most significant decoder stage should have the RBI input grounded; and since suppression of the least significant integer zero in a number is not usually desired, the RBI input of this decoder stage should be left open. A similar procedure for the fractional part of a display will provide automatic suppression of trailing-edge zeroes. The RBO terminal of the decoder can be OR-tied with a modulating signal via an isolating buffer to achieve pulse duration intensity modulation. A suitable signal can be generated for this purpose by forming a variable frequency multivibrator with a cross coupled pair of TTL or DTL gates.
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2
DM9370
Numerical Designation
Logic Diagram
3
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DM9370
Absolute Maximum Ratings(Note 1)
Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range 7V 5.5V 0C to +70C -65C to +150C
Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation.
Recommended Operating Conditions
Symbol VCC VIH VIL IOH IOL TA tS (H) tS (L) tH (H) tH (L) tW (L) Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Free Air Operating Temperature Setup Time HIGH or LOW An to LE Hold Time HIGH or LOW An to LE LE Pulse Width LOW 0 Parameter Min 4.75 2 0.8 -80 3.2 70 30 20 0 0 45 Nom 5 Max 5.25 Units V V V A mA C ns ns ns
Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH VOL II IIL IOS VOH VOL Parameter Input Clamp Voltage HIGH Level Output Voltage LOW Level Output Voltage Input Current @ Max Input Voltage LOW Level Input Current Short Circuit Output Current Output HIGH Voltage Output LOW Voltage RBO RBO a-g IOH ICC Output HIGH Current, a-g Power Supply Current VCC = Max A1, A2, A 3, LE = GND VCC = Max, Outputs OPEN A0, A1, A 2, LE = GND VCC = Max, Outputs OPEN
Note 2: All typicals are at VCC = 5V, TA = 25C. Note 3: Not more than one output should be shorted at a time.
Conditions VCC = Min, II = -12 mA VCC = Min, IOH = Max VIL = Max VCC = Min, IOL = Max VIH = Min VCC = Max, VI = 5.5V VCC = Max, VI = 0.4V VCC = Max (Note 3) VCC = Min, IOH -80 A IOL = 3.2 mA IOL = 25 mA VCC = Min
Min
Typ (Note 2)
Max -1.5
Units V V
2.4
3.4 0.2 0.4 1 -1.6
V mA mA mA V
-20 2.4
-70
0.4 V 0.4 250 105 105 mA 94 A A
Switching Characteristics
VCC = +5.0V, TA = +25C Symbol tPLH tPHL tPLH tPHL Propagation Delay An to a-g Propagation Delay LE to a-g Parameter CL = 15 PF, RL = 500 Min Max 75 50 90 70 Units ns ns
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4
DM9370 7-Segment Decoder/Driver/Latch with Open-Collector Outputs
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 5 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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